The workshop was held at TU Berlin from December 2 – 4, 2010, supported by Sim4 Nano BMBF.
This workshop of the BMBF research network SyreNe aims to bring together researchers and users of model order reduction techniques with special emphasis on applications in micro- and nanoelectronics. Contributions from other areas such as computational electromagnetics, mechanical systems, computational fluid dynamics and related disciplines are welcome.
Invited Speakers
- Michel S. Nakhla (Carleton University, Ottawa, Canada) : Model-Order Reduction of High-Speed Interconnects: Challenges and Opportunities
- Joel Phillips (Cadence Research Laboratories, Berkeley, USA) : Model Order Reduction in VLSI ASIC Design: What We Use, What We Want, and Why
- Timo Reis (TU Hamburg-Harburg, Germany) : Balanced Truncation for a Class of Parabolic Partial Differential Equations
Scientific Committee
- Peter Benner (TU Chemnitz)
- Matthias Bollhöfer (TU Braunschweig)
- Heike Faßbender (TU Braunschweig)
- Michael Hinze (Universität Hamburg)
- Patrick Lang (ITWM Kaiserslautern)
- Tatjana Stykel (TU Berlin)